NVMe Self-Study Bank: Data I/O: size, persistence and integrity

NVMe · Q1–328

NVM Express Base 2.4NVM Command Set 1.3NVMe over PCIe Transport 1.4

Q321–Q328

Data I/O: size, persistence and integrity

This supplement develops data-I/O reasoning not previously covered in depth: request validity, completion guarantees, content verification and partial failure effects. Derive answers from concrete field values while linking back to existing feature, queue and pointer lessons.

Each question is followed by its explanation. Start with the volume overview, then follow the field interpretations, comparisons or processes. Essential conditions and the normal path are visible from the start. All numerical examples are hypothetical. Status is written SCT/SC; h indicates hexadecimal.

SCT
Status Code Type

Choose the claim before choosing the command

Request validity, content correctness, persistence and atomicity are separate claims; one success cannot prove all four.

Question to establishEvidence to combineEasily missed condition
Is the request range valid?MDTS, MPSMIN, NLB, NSZE, transferred formatNLB+1 and metadata accounting
Is completed data persistent?WCE, FUA, Flush scope and timingWhether the Write completed before Flush submission
Can interruption leave a partial update?Effective atomic units, MAM, boundaries and LBAsNormal and power-fail atomicity differ
Does readable mean correct?Read, Compare, Verify and PI conditionsVerify does not compare application expectations
What changed before failure?Copy DW0, destination readback, source snapshotDW0=0 does not prove an untouched destination
PI
Protection Information

Worked interpretation: In the example, Write A succeeds before Flush is submitted for the same namespace. Successful Flush then supplies the covered persistence guarantee. Submitting both concurrently does not let an earlier Flush success cover an unfinished A; timing, not success-counting, is decisive.

Sources: Base 2.4 §7.2–7.2.1 · NVM Command Set 1.3 §3.3.4, 3.3.6 (data pointers, SLBA, NLB, FUA and completion) · NVM Command Set 1.3 §2.1.4–2.1.4.6 · NVM Command Set 1.3 §3.3.5–3.3.5.1 · NVM Command Set 1.3 §3.3.2–3.3.2.3, 3.3.2.5 (Formats 0h/1h; cross-namespace formats only for contrast)

Review the terminology when needed
Controller / namespace
A controller receives commands and manages access. A namespace is a logical storage space that commands can address. An NVM subsystem contains controllers and nonvolatile storage resources.
SQ / CQ / SQE / CQE
Submission and Completion Queues carry command entries (SQEs) and completion entries (CQEs). QID identifies a queue, CID distinguishes outstanding commands in one SQ, and NSID identifies a namespace.
Register / Identify / Feature / Log
A register exposes control or state. Identify queries capabilities and attributes; features query or configure operation; log pages report specific state or records. FID, LID, CNS and CSI select features, logs, Identify structures and command sets.
index / offset / zero-based
An index selects an entry, usually starting at 0; an offset measures distance from an origin in specified units. A zero-based count encodes count−1, but not every zero-valued field is a count. A Dword is 4 bytes; a byte is 8 bits.
Scope / reset / retention
Scope names the affected objects; retention means preserving state. Controller Reset (clearing CC.EN) is one form of Controller Level Reset, or CLR. Different CLR triggers can retain different registers.

Questions in this volume

  1. Q321 · Is a Read/Write length valid across MDTS, NLB and namespace bounds?
  2. Q322 · Does successful Write imply power-loss persistence, and what do Flush and FUA guarantee?
  3. Q323 · Why can a small Write lose whole-command atomicity when it crosses a boundary?
  4. Q324 · What do successful Read, Compare and Verify actually prove?
  5. Q325 · Must reads return zero after Write Zeroes or Deallocate?
  6. Q326 · Why did PI checking miss an error? A Type 1, 16-bit Guard example
  7. Q327 · What does CQE.DW0 establish after a Copy failure?
  8. Q328 · Does a read failure after Write Uncorrectable prove damaged media?

Q321 Is a Read/Write length valid across MDTS, NLB and namespace bounds?

Follow the explanation

Validate block count, host-transfer bytes and the final namespace LBA separately. A PRP list capable of describing the buffer does not establish a legal transfer size.

LBA
Logical Block Address
PRP
Physical Region Page, a data-page pointer

1. Establish the source and scope

Consider ordinary Read/Write without other command extensions. NSID selects the namespace; MDTS limits host/controller transfer size while NSZE bounds LBA addresses.

NSID
Namespace Identifier

Read MDTS, CTRATT.MEM, CAP.MPSMIN, NSZE and the selected LBA format, including LBADS/MS and metadata layout. A nonzero MDTS gives 2^MDTS × 2^(12+MPSMIN) bytes, not a limit based on current CC.MPS.

2. Fields, units and worked interpretation

SLBA is the starting address, NLB+1 is the block count, and SLBA+NLB is the final LBA. Each data block has 2^LBADS bytes. Interleaved metadata counts toward MDTS when MEM=0 and is excluded when MEM=1.

SLBA
Starting Logical Block Address

Fix the namespace format, validate the LBA range, calculate transfer bytes, then construct pointers. With hypothetical MPSMIN=0, MDTS=5, 4096-byte data, 8-byte interleaved metadata without PI and MEM=0, NLB=31 requires 131328 bytes rather than 131072; ignoring metadata misses 256 bytes.

PI
Protection Information

Under that example, 31 blocks require 127224 bytes and encode NLB=30. This satisfies MDTS only; namespace access, pointers and any PI must also be valid for successful completion.

3. Conditions that change the interpretation

Exceeding MDTS requires Invalid Field (0/02h); exceeding namespace bounds uses LBA Out of Range (0/80h). NSZE=1024, SLBA=1000 and NLB=31 end at LBA1031 beyond 1023. Isolate one invalid condition when testing an exact status.

MDTS=0 removes this particular limit, not NLB encoding, namespace bounds or command-specific limits. Do not apply MDTS directly to Verify, Write Zeroes or Write Uncorrectable, which do not transfer host payload data.

Sources: Base 2.4 §3.1.4 (CAP, VS) · Base 2.4 §4.2.1, 4.3.1–4.3.2 (PCIe-applicable layouts) · Base 2.4 §5.2.14.2.1 · NVM Command Set 1.3 §4.1.5.1–4.1.5.4 · NVM Command Set 1.3 §3.3.4, 3.3.6 (data pointers, SLBA, NLB, FUA and completion) · Base 2.4 §4.2.3 (Media and Data Integrity Errors only) · Base 2.4 §3.7.1–3.7.4 · Base 2.4 §4.2.3 · Base 2.4 §5.2.13.1.2 · Base 2.4 §5.2.2 · Base 2.4 §5.2.13.1.14 (header, reset, hardware, Set Feature events)

Back to questions

Q322 Does successful Write imply power-loss persistence, and what do Flush and FUA guarantee?

Follow the explanation

Write success completes the command, but enabled volatile caching may retain the data. Persistence requires the applicable nonvolatile-storage guarantee; ordinary successful readback or a CQE alone is insufficient.

CQE
Completion Queue Entry

1. Prepare the operation

Write FUA applies to that command’s data and metadata. Flush covers commands for its namespace completed by the controller before Flush submission; it does not automatically order all still-running commands.

Check VWC.VWCP, current FID 06h.WCE, VWC.FB broadcast support and applicable namespace VWCNP. Controller-wide cache presence does not imply a cache for every namespace.

FID
Feature Identifier

Write FUA=1 commits its data and metadata before completion; FUA=0 adds no requirement. Flush selects scope with NSID and has reserved command-specific fields. FB=11b permits broadcast Flush over namespaces attached to the submitting controller.

NSID
Namespace Identifier

2. Sequence and completion conditions

For a batch, wait for the target Writes to succeed, submit Flush for the correct NSID and wait for its success. Concurrently submitting Write A and Flush does not establish that an earlier Flush completion covers A. Alternatively, use FUA=1 on each Write and await each success.

Successful Flush makes covered data persistent. Without a present/enabled volatile cache it has no effect and must succeed when no Sanitize is in progress; this is not an unsupported-Flush error.

3. Handle unmet conditions

Broadcast Flush with FB=10b requires Invalid Namespace or Format (0/0Bh). Base 2.4 controllers cannot use the old FB=00b undefined broadcast behavior. Sanitize in progress has separate command rules.

FUA/Flush do not enlarge atomic write units. Atomicity constrains interrupted or concurrent data combinations; persistence constrains post-success loss of committed data. Correlate timing, WCE, FUA and Flush coverage.

Sources: Base 2.4 §7.2–7.2.1 · Base 2.4 §5.2.30.1.4 · NVM Command Set 1.3 §2.1.4–2.1.4.6 · Base 2.4 §5.2.14.2.1 · NVM Command Set 1.3 §4.1.5.1–4.1.5.4 · NVM Command Set 1.3 §3.3.4, 3.3.6 (data pointers, SLBA, NLB, FUA and completion) · Base 2.4 §4.2.3 (Media and Data Integrity Errors only) · Base 2.4 §3.7.1–3.7.4 · Base 2.4 §4.2.3 · Base 2.4 §5.2.13.1.2 · Base 2.4 §5.2.2 · Base 2.4 §5.2.13.1.14 (header, reset, hardware, Set Feature events)

Back to questions

Q323 Why can a small Write lose whole-command atomicity when it crosses a boundary?

Follow the explanation

Atomicity depends on effective size, namespace atomicity mode and boundary alignment. Equal-length Writes with different starting LBAs can have different guarantees.

1. Establish the source and scope

Normal atomicity constrains inter-command results; power-fail atomicity constrains old/new data after interruption by power failure or error. Neither is a substitute for post-success persistence.

Check NSABP, MAM and FID 0Ah.DN. When namespace units are supported, a zero NAWUN/NAWUPF falls back to AWUN/AWUPF; nonzero values encode count−1. MAM distinguishes Single from Multiple Atomicity Mode, and DN can remove normal-atomicity requirements.

FID
Feature Identifier

2. Fields, units and worked interpretation

NABSN/NABSPF define normal/power-fail boundary sizes: zero means no boundary, while nonzero encodings decode by adding one. NABO is an LBA offset, not a count. Decoded boundaries occur at NABO+y×size for nonnegative integer y.

Assume NSABP=1, MAM=0, DN=0, baseline AWUN=AWUPF=0, NAWUN=7, NAWUPF=1, boundary encodings 15 and offset 0. The effective units are 8 and 2 blocks, with 16-block boundaries. LBAs 14–15 stay within one boundary region;15–16 cross LBA16.

A normally completed Write reports Success; interruption atomicity additionally requires readback evidence. An interrupted 2-block Write at 14–15 must yield all old or all new data under the stated power-fail conditions. At 15–16 it lacks that whole 2-block guarantee. A valid Multiple Atomicity configuration instead makes each boundary-delimited subrange atomic, not the whole crossing command.

3. Conditions that change the interpretation

Exceeding an atomic unit or crossing a boundary does not universally require rejection of an ordinary Write. It can succeed with different guarantees; fused-operation Atomic Write Unit Exceeded rules are not universal Write rules.

Rediscover namespace atomic fields after Format and use the new LBA size. Capture concurrency when testing normal atomicity. One intact readback does not establish a larger guarantee than advertised.

Sources: NVM Command Set 1.3 §2.1.4–2.1.4.6 · NVM Command Set 1.3 §4.1.3.1–4.1.3.7 · Base 2.4 §5.2.14.2.1 · NVM Command Set 1.3 §4.1.5.1–4.1.5.4 · NVM Command Set 1.3 §3.3.4, 3.3.6 (data pointers, SLBA, NLB, FUA and completion) · Base 2.4 §4.2.3 (Media and Data Integrity Errors only) · Base 2.4 §3.7.1–3.7.4 · Base 2.4 §4.2.3 · Base 2.4 §5.2.13.1.2 · Base 2.4 §5.2.2 · Base 2.4 §5.2.13.1.14 (header, reset, hardware, Set Feature events)

Back to questions

Q324 What do successful Read, Compare and Verify actually prove?

Follow the explanation

Read returns data, Compare tests a host-supplied expected buffer, and Verify checks stored-information integrity without returning payload. Verify success does not establish equality with an application’s expected value.

1. What differs

All select a namespace/range, but Compare consumes host data, Read fills a host buffer and Verify transfers no host payload. They therefore do not produce identical buffer evidence.

SLBA/NLB select the range and PRCHK selects PI checks. Compare includes non-PI metadata in equality checks. Verify requires PRACT=0; FUA=1 commits associated cached data before verifying nonvolatile contents, without ordering other commands.

2. How to choose and verify

Discover opcode support/effects and Verify’s VSL/NVMVFYS rules. A nonzero VSL can be a recommended maximum under the advertised variant, not universally a rejection threshold. MDTS does not directly limit payload-free Verify.

With valid data A at LBA100, wait for the Write, read back A, then compare against A and against different B. The latter should report Compare Failure. Verify may still succeed even if the application intended B, because it checks stored integrity rather than that expectation.

Read success plus returned bytes establishes readback; Compare success establishes equality with its supplied data; Verify success establishes the requested integrity verification. Concurrent writes can invalidate comparisons across separate observations.

3. Conditions that shape the comparison

Mismatch uses Compare Failure (2/85h), not Unrecovered Read Error (2/81h). Verify with nonzero PRACT requires Invalid Field (0/02h); detected PI failures have their own integrity statuses. Verify and Read need not report the same error for the same media problem.

Data read or integrity-checked by Verify must contribute to SMART Data Units Read despite no host payload transfer. The counter represents defined work, not necessarily delivered bytes; account for units and rounding.

4. Evidence supplied by the log

Verify reads/integrity checks contribute to Data Units Read even without host payload transfer. Correlate failures through More/error-log rules; normal verification does not require an error entry.

Sources: NVM Command Set 1.3 §3.3.1–3.3.1.1 · NVM Command Set 1.3 §3.3.5–3.3.5.1 · Base 2.4 §5.2.13.1.3 · Base 2.4 §5.2.14.2.1 · NVM Command Set 1.3 §4.1.5.1–4.1.5.4 · NVM Command Set 1.3 §3.3.4, 3.3.6 (data pointers, SLBA, NLB, FUA and completion) · Base 2.4 §4.2.3 (Media and Data Integrity Errors only) · Base 2.4 §3.7.1–3.7.4 · Base 2.4 §4.2.3 · Base 2.4 §5.2.13.1.2 · Base 2.4 §5.2.2 · Base 2.4 §5.2.13.1.14 (header, reset, hardware, Set Feature events)

Back to questions

Q325 Must reads return zero after Write Zeroes or Deallocate?

Follow the explanation

Write Zeroes requires zero-valued successful readback; Dataset Management Deallocate supplies a no-longer-needed-data attribute that the controller may choose not to act on. Neither success is proof of irreversible data sanitization.

1. What differs

Compare range operations in one namespace, initially using ordinary Write Zeroes with NSZ=0. Whole-namespace NSZ=1 has extra requirements and is not implied by range-operation success.

Write Zeroes NLB and Dataset Management NR are zero-based; each Dataset Management range length is a one-based count. DEAC requests deallocation. Decode each field according to its own definition.

2. How to choose and verify

Check command support, DLFEAT.DRB, NSFEAT.DAE and current FID 05h.DULBE. DRB defines deallocated read values, DAE advertises the error capability, and DULBE enables that error.

Assume DRB=001b and DAE=1. After valid Write Zeroes, deallocated blocks with DULBE=1 produce Deallocated or Unwritten Logical Block. With DULBE=0, successful readback is zero. DEAC=0 does not prohibit deallocation when the required zero-read behavior is preserved.

A DULBE error after Write Zeroes is not by itself a zeroing failure. Dataset Management success likewise does not prove every range was deallocated; distinguish processing rules from actual effects.

3. Conditions that shape the comparison

Supported/enabled DULBE requires 2/87h for applicable reads of deallocated/unwritten blocks. Write Zeroes with NSZ=1 but DEAC=0, or without zero-valued deallocated reads, requires Invalid Field (0/02h).

With DULBE disabled, genuinely deallocated blocks return all 00h or allFFh according to DRB. DRB=000b permits either, but a block’s returned value must remain deterministic until a write. Read/Verify do not allocate it.

Sources: NVM Command Set 1.3 §3.3.3–3.3.3.3, 3.3.8–3.3.8.2 · NVM Command Set 1.3 §4.1.3.1–4.1.3.7 · Base 2.4 §5.2.14.2.1 · NVM Command Set 1.3 §4.1.5.1–4.1.5.4 · NVM Command Set 1.3 §3.3.4, 3.3.6 (data pointers, SLBA, NLB, FUA and completion) · Base 2.4 §4.2.3 (Media and Data Integrity Errors only) · Base 2.4 §3.7.1–3.7.4 · Base 2.4 §4.2.3 · Base 2.4 §5.2.13.1.2 · Base 2.4 §5.2.2 · Base 2.4 §5.2.13.1.14 (header, reset, hardware, Set Feature events)

Back to questions

Q326 Why did PI checking miss an error? A Type 1, 16-bit Guard example

Follow the explanation

PI protects integrity and block association, but formatting a namespace with PI does not enable every check on every command. Format, PRACT, PRCHK and special tag values determine actual processing.

1. Establish the source and scope

Limit the example to Type 1,16-bit Guard, STS=0 and 8-byte PI, not 32/64-bit Guard layouts. Guard, Application Tag and Reference Tag occupy 2,2 and 4 metadata bytes respectively.

DPC advertises protection capabilities, DPS selects the current protection type, and MS gives metadata size. Also establish the active PI format and STS; capabilities alone do not identify the current layout.

2. Fields, units and worked interpretation

PRCHK bits 2/1/0 select Guard/Application/Reference checks; PRACT controls passing, generation or removal. With reference-tag checking enabled, Type 1 ILBRT/EILBRT must match the relevant low SLBA bits. Application-tag mask bits set to 1 are compared; zero masks them.

With hypothetical 4096-byte data, MS=8, PRACT=0 and PRCHK=111b, first use valid PI and avoid the FFFFh application-tag escape. Establish a valid baseline, then corrupt one Guard/Application/Reference field at a time while preserving other inputs.

The valid baseline should complete successfully; PRACT determines which data/metadata Read returns. With MS equal to the 8-byte PI size, Write.PRACT=1 generates/appends PI without those host bytes and ignores PRCHK; Read.PRACT=1 checks as applicable, then strips PI before returning data. If MS exceeds PI size, the full metadata does not simply disappear from the host buffer.

3. Conditions that change the interpretation

Enabled, non-escaped check failures use Guard 2/82h, Application 2/83h or Reference 2/84h. With that check enabled, a Type 1 command ILBRT/EILBRT inconsistent with SLBA instead requires Invalid Protection Information (1/81h), distinct from bad stored tags.

Type 1/Type 2 Application Tag=FFFFh disables PI checks despite PRCHK. An intentionally bad Guard can therefore succeed because PRACT regenerates PI or a special tag suppresses checking, rather than because the controller omitted a required check.

Sources: NVM Command Set 1.3 §2.1.5, 5.3.1.1 (STS=0), 5.3.2.1–5.3.2.2, 5.3.3 · Base 2.4 §5.2.14.2.1 · NVM Command Set 1.3 §4.1.5.1–4.1.5.4 · NVM Command Set 1.3 §3.3.4, 3.3.6 (data pointers, SLBA, NLB, FUA and completion) · Base 2.4 §4.2.3 (Media and Data Integrity Errors only) · Base 2.4 §3.7.1–3.7.4 · Base 2.4 §4.2.3 · Base 2.4 §5.2.13.1.2 · Base 2.4 §5.2.2 · Base 2.4 §5.2.13.1.14 (header, reset, hardware, Set Feature events)

Back to questions

Q327 What does CQE.DW0 establish after a Copy failure?

CQE
Completion Queue Entry
Follow the explanation

Copy assembles multiple source ranges into a consecutive destination without routing payload through the host. Failure may leave partial effects; its CQE does not provide transactional rollback.

1. Establish the source and scope

Use a same-namespace Format 0h example. NSID selects the destination namespace and SDLBA its start; descriptor order determines destination placement. Cross-namespace Formats 2h/3h add rules beyond merely changing NSID.

Discover Copy/descriptor support, MSRC, MSSRL and MCL. MSRC is a zero-based source-range count; MSSRL and MCL bound per-range and total block counts. Destination atomicity remains a separate constraint.

2. Fields, units and worked interpretation

Decode zero-based NR and source NLB before summing. NR=1 with source NLB values 3 and 1 describes 4+2 blocks. SDLBA=1000 places them at 1000–1003 and 1004–1005, not both at 1000.

Validate ranges, nonoverlap and all three Copy limits, preserving source and old-destination data. On failure, DW0 identifies the lowest-numbered source entry not successfully copied, not a successful-block count or a guaranteed execution cursor.

Successful Copy places all source content consecutively in descriptor order. Failure does not imply no changes: if ranges 0,1 and 3 succeed but 2 does not, DW0=2. It does not prove range 3 was untouched or range 2 had no partial effects. No destination writes requires DW0=0, but DW0=0 does not prove no writes.

3. Conditions that change the interpretation

Source-length/total-copy limit violations use 1/83h. Hosts should avoid overlap for Formats 0h/1h, but cannot universally demand Overlapping I/O Range there; Formats 2h/3h explicitly prohibit relevant overlap and require 1/87h. Fix descriptor format before testing status.

Applicable NVM1.3 NVMCSA rules treat the destination write as one Write for atomicity, not as an unlimited atomic transaction. Before retrying, inspect destination effects, atomic subranges and source changes rather than treating DW0 as a safe resume cursor.

Sources: NVM Command Set 1.3 §3.3.2–3.3.2.3, 3.3.2.5 (Formats 0h/1h; cross-namespace formats only for contrast) · NVM Command Set 1.3 §2.1.4–2.1.4.6 · Base 2.4 §5.2.14.2.1 · NVM Command Set 1.3 §4.1.5.1–4.1.5.4 · NVM Command Set 1.3 §3.3.4, 3.3.6 (data pointers, SLBA, NLB, FUA and completion) · Base 2.4 §4.2.3 (Media and Data Integrity Errors only) · Base 2.4 §3.7.1–3.7.4 · Base 2.4 §4.2.3 · Base 2.4 §5.2.13.1.2 · Base 2.4 §5.2.2 · Base 2.4 §5.2.13.1.14 (header, reset, hardware, Set Feature events)

Back to questions

Q328 Does a read failure after Write Uncorrectable prove damaged media?

Follow the explanation

Write Uncorrectable deliberately marks logical blocks invalid so later reads fail. This is a requested logical state change; the resulting Unrecovered Read Error alone does not prove physical NAND damage.

1. Mechanism and scope

The operation targets an LBA range rather than disabling the whole namespace. Other attached controllers can observe the invalid state, so account for concurrent writes.

SLBA selects the start and zero-based NLB selects count. SLBA200/NLB1 targets blocks 200 and 201. No host Read/Write payload buffer carries an invalid marker; the command requests the state change.

2. Understand it through actions and results

Check command support, WUSL and NVMWUSV. With nonzero WUSL, variant 1 makes it a recommended maximum; variant 0 makes exceeding it a rejection condition. The command has no host payload, so MDTS is not its direct limit.

Establish valid data, complete Write Uncorrectable, then read the marked range and an unmarked control range. A subsequent valid Write clears the invalid-block status; do not substitute Reset for that write.

The marking command can succeed while subsequent reads require Unrecovered Read Error. A new write clears invalid status, permitting new-data readback absent other errors. Verify all three stages together.

3. Avoid a misleading conclusion

Subsequent read failure is 2/81h; the marking command need not fail. Exceeding effective WUSL with NVMWUSV=0 requires Invalid Field (0/02h), unlike variant 1’s advisory size.

Correlate marking success, read failure and rewritten data with applicable logs/counters. Even when a read error contributes to relevant statistics, a known host-requested invalid mark is not by itself evidence of physical degradation.

Sources: NVM Command Set 1.3 §3.3.7–3.3.7.1 · NVM Command Set 1.3 §2.1.4–2.1.4.6 · Base 2.4 §5.2.13.1.3 · Base 2.4 §5.2.14.2.1 · NVM Command Set 1.3 §4.1.5.1–4.1.5.4 · NVM Command Set 1.3 §3.3.4, 3.3.6 (data pointers, SLBA, NLB, FUA and completion) · Base 2.4 §4.2.3 (Media and Data Integrity Errors only) · Base 2.4 §3.7.1–3.7.4 · Base 2.4 §4.2.3 · Base 2.4 §5.2.13.1.2 · Base 2.4 §5.2.2 · Base 2.4 §5.2.13.1.14 (header, reset, hardware, Set Feature events)

Back to questions

Source locations and existing figure guides

Base printed page = PDF page−26; the other two use identical numbers. Locations follow the supplied PDF body and retain figure numbers. Shared pages contribute only the relevant definitions, excluding Fabrics and PCIe link/packet content.

  • Base 2.4 · §3.1.4 (CAP, VS)
    Printed pages 54–59 · PDF 80–85 · Figure 36–37
  • Base 2.4 · §3.7.1–3.7.4
    Printed pages 120–124 · PDF 146–150
  • Base 2.4 · §4.2.1, 4.3.1–4.3.2 (PCIe-applicable layouts)
    Printed pages 140–142, 158–164 · PDF 166–168, 184–190 · Figure 93, 110–122
  • Base 2.4 · §4.2.3
    Printed pages 145–155 · PDF 171–181 · Figure 101–105
  • Base 2.4 · §4.2.3 (Media and Data Integrity Errors only)
    Printed pages 154–155 · PDF 180–181 · Figure 107
  • Base 2.4 · §5.2.2
    Printed pages 183–190 · PDF 209–216 · Figure 150–156
  • Base 2.4 · §5.2.13.1.2
    Printed pages 218–220 · PDF 244–246 · Figure 212
  • Base 2.4 · §5.2.13.1.3
    Printed pages 220–225 · PDF 246–251 · Figure 213–214
  • Base 2.4 · §5.2.13.1.14 (header, reset, hardware, Set Feature events)
    Printed pages 244–256, 258, 262–264 · PDF 270–282, 284, 288–290 · Figure 232–244, 246, 252–253
  • Base 2.4 · §5.2.14.2.1
    Printed pages 340–387 · PDF 366–413 · Figure 338–341
  • Base 2.4 · §5.2.30.1.4
    Printed pages 464–465 · PDF 490–491 · Figure 471
  • Base 2.4 · §7.2–7.2.1
    Printed pages 567 · PDF 593
  • NVM Command Set 1.3 · §2.1.4–2.1.4.6
    Printed pages 15–21 · PDF 15–21 · Figure 4–10
  • NVM Command Set 1.3 · §2.1.5, 5.3.1.1 (STS=0), 5.3.2.1–5.3.2.2, 5.3.3
    Printed pages 21–22, 131, 141–145, 151–152 · PDF 21–22, 131, 141–145, 151–152 · Figure 11–12, 155, 174–175
  • NVM Command Set 1.3 · §3.3.1–3.3.1.1
    Printed pages 27–30 · PDF 27–30 · Figure 24, 26–27, 31
  • NVM Command Set 1.3 · §3.3.2–3.3.2.3, 3.3.2.5 (Formats 0h/1h; cross-namespace formats only for contrast)
    Printed pages 30–40, 43–44 · PDF 30–40, 43–44 · Figure 34–35, 39–40, 42–43
  • NVM Command Set 1.3 · §3.3.3–3.3.3.3, 3.3.8–3.3.8.2
    Printed pages 44–48, 57–61 · PDF 44–48, 57–61 · Figure 45–47, 49, 83, 88–89
  • NVM Command Set 1.3 · §3.3.4, 3.3.6 (data pointers, SLBA, NLB, FUA and completion)
    Printed pages 48–51, 53–56 · PDF 48–51, 53–56 · Figure 53–54, 59, 68, 70–71, 76
  • NVM Command Set 1.3 · §3.3.5–3.3.5.1
    Printed pages 51–53 · PDF 51–53 · Figure 61–62, 66
  • NVM Command Set 1.3 · §3.3.7–3.3.7.1
    Printed pages 56–57 · PDF 56–57 · Figure 77–80
  • NVM Command Set 1.3 · §4.1.3.1–4.1.3.7
    Printed pages 64–69 · PDF 64–69 · Figure 92–101
  • NVM Command Set 1.3 · §4.1.5.1–4.1.5.4
    Printed pages 84–107 · PDF 84–107 · Figure 123–130

When you need a field guide

Existing figure explanations have canonical locations; use these links instead of duplicating the same guide.

Original documents used
  • NVM Express Base Specification · Revision 2.4 · 2026-07-31
    NVM-Express-Base-Specification-Revision-2.4-Ratified-2026.07.31.pdf
  • NVM Express NVM Command Set Specification · Revision 1.3 · 2026-07-31
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Jia-Chang

Jia-Chang

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