PCIe Chapter 31: DOE and Component Measurement and Authentication

DOE (Data Object Exchange) lets firmware/software exchange objects through configuration space. CMA (Component Measurement and Authentication) can use SPDM (Security Protocol and Data Model) over it. First establish the transport exchange, then interpret protocol content and trust.

Roles and events in this chapterDiscover a protocol, exchange a mailbox object, and handle completion or abort.Software: discover DOE protocolsCheck Busy; write full objectGo; wait for Ready or ErrorRead and acknowledge each DW
Author-drawn teaching diagram based on PCI Express Base 6.0. Exchanges unrelated to this lesson are omitted.
DOE
Data Object Exchange
DW
Double Word, a four-byte unit

Walk Discovery for one DOE instance

Find a DOE (Data Object Exchange) instance in the Function's Extended Capability List. Every instance must support DOE Discovery; one Function can implement multiple instances with different protocols. DOE uses Configuration Requests and is not a direct Function-to-Function P2P transport.

Simulated data: the instance starts at D, is ready to receive an object, and has one exclusive software owner for this exchange. Figure 6-38 places two header DWORDs before the content; Figure 6-41/Table 6-30 defines the third DWORD of a Discovery Request.

Write orderDWORDInterpretation
Header 100000001hVendor ID=0001h; Data Object Type=00h (Discovery)
Header 200000003hLength=3 DWORDs including both headers
Content00000000hIndex=00h; Reserved bits written as zero

Write the three DWORDs in order to the Write Data Mailbox at D+10h, then write 1 to DOE Go at D+08h. Go before the whole object is written, or while DOE Busy=1, has undefined behavior. Go always reads as zero and is not a completion indicator.

Figure 6-40 defines Length in DWORDs including the two headers. Encoding 00000h means 218 DWORDs, not zero. Unless the protocol specifies otherwise, a transfer whose actual number of DWORDs differs from Length is silently discarded; a normal response cannot be assumed.

PCIe Base 6.0 §§6.30–6.30.1.1, Figures 6-38–6-41, Tables 6-28–6-30, printed/PDF pp.843–846; §7.9.24.3, Figure 7-361/Table 7-315, p.1297.

Read and acknowledge each response DWORD

For this simulated instance, DOE Interrupt Enable=0 and software polls Status at D+0Ch. Busy is bit 0, Error bit 2, and Data Object Ready bit 31. Assume the result becomes 80000000h: Ready=1, Busy=0, Error=0.

Under §7.9.24.6, each read from the Read Data Mailbox at D+14h returns the current DWORD. Write any value to the same register to acknowledge that DWORD before the next read. Assume this response:

Read orderDWORDAfter reading
Header 100000001hWrite any value to acknowledge
Header 200000003hWrite any value to acknowledge
Content01000001hAcknowledge the final DWORD

Header Length=3 confirms three DWORDs. Figure 6-42/Table 6-31 decodes content as Vendor ID=0001h, Data Object Protocol=00h and Next Index=01h. Index 00h describes Discovery; query Index 01h by sending a new Request whose content is 00000001h.

Assume Index 01h returns content 00010001h: Vendor ID=0001h, Protocol=01h (CMA/SPDM), Next Index=00h. The list ends here. Index meanings beyond Discovery are instance-specific. Vendor ID FFFFh indicates an invalid/out-of-range index; the other fields are undefined.

CMA
Component Measurement and Authentication
SPDM
Security Protocol and Data Model

Acknowledge the last DWORD too. Hardware clears Ready when no further object is ready; Ready may remain set for consecutive objects. Omitting acknowledgement repeats the current DWORD. When Ready=0, a read value of 00000000h is not available object data.

PCIe Base 6.0 §6.30.1.1, Figure 6-42/Tables 6-31–6-32, printed/PDF pp.846–847; §§7.9.24.4–7.9.24.6, pp.1297–1299. On p.1299, Figure 7-364 and Table 7-318 are titled Write Data Mailbox; the section, field and description define the Read Data Mailbox.

Recover the instance after DOE Error

DOE Error is read-only, not Write 1 to Clear. Write 1 to DOE Abort at D+08h; the instance must clear Error and Ready within one second. Abort always reads as zero. Busy may remain set temporarily after Abort, so wait until it clears before sending another object. Coordinate ownership over the whole request/response when multiple software actors share the instance.

For request/response protocols without a protocol-specific limit, §6.30.2 requires processing within one second of Go and Ready when a response is required, or Error within the same limit. This is a device requirement; a single Busy observation does not establish a timeout. FLR aborts an ongoing DOE transfer but need not reset the internal processing engine.

FLR
Function Level Reset

DOE Interrupt Status is a separate RW1C status. Clearing it does not clear DOE Error. Check DOE Capabilities, Control and MSI/MSI-X settings for interrupt support, enable and vector. DOE transport errors and the carried protocol's errors require separate interpretation.

MSI
Message Signaled Interrupt
MSI-X
Message Signaled Interrupts Extension

PCIe Base 6.0 §6.30.2, printed/PDF pp.847–848; §§7.9.24.2–7.9.24.4, Tables 7-314–7-316, pp.1296–1298.

Separate transport success from trust

SPDM (the security protocol and data model) and platform trust policy still apply. Figure 6-43 separates the protocol, secured messages, and DOE/MCTP transport layers. Section 6.31 says PCIe-specific requirements belong here while foundational messages and architecture come from the referenced SPDM documents. Transport completion alone does not validate identity or measurements, and this lesson does not invent a certificate algorithm or silently substitute a newer SPDM revision.

Edition and sources

This chapter uses PCI Express Base Specification Revision 6.0 (6.0-1.0-PUB). Document and PDF page numbers match. Example configurations and values are author assumptions, not device measurements.

Complete source locations
  • §§6.30–6.30.2; pp.843–848; Figures 6-38–6-42; Tables 6-28–6-32
  • §7.9.24.3; §7.9.24.4; §7.9.24.5; §7.9.24.6; pp.1296–1299; Figures 7-361, 7-362, 7-363, 7-364; Tables 7-315, 7-316, 7-317, 7-318
  • §6.31; pp.849,850; Figures 6-43
Jia-Chang

Jia-Chang

Human

Comments

  Write a comment ...