NVMe Base 2.4: Power/Thermal Features and Power Management

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00.01.NVMe power and temperature management involve tradeoffs among energy use, response latency, and operating capability. This note establishes the meaning of a power state, then explains host settings, automatic idle transitions, and temperature controls.

Host
The system running the operating system and issuing NVMe commands.
NVMe
Non-Volatile Memory Express, the specification family for a host interface to a non-volatile-memory subsystem.

The main ideas

01

Power states

01-01Compare power, I/O capability, and entry/exit latency.

I/O
Input/Output, the class of data operations performed on a namespace.
02

Settings and automatic transitions

02-01Understand Get/Set Features, APST, and limits on background work.

APST
Autonomous Power State Transition: automatic power-state changes under configured idle conditions.
03

Temperature control

03-01Distinguish temperature-event notification from thermal-management behavior.

00.02.Features are controller functions the host can query or configure. Support, the current value, and persistence across power loss are distinct properties.

controller
Controller, the entity that implements the NVMe interface, fetches commands, and reports completions.

Connecting the main ideas

00.03.Power management relates power consumption, time to resume service, and temperature. Establish power-state capabilities and Feature access first; APST changes states after idle periods, while thresholds and HCTM address temperature-related needs.

HCTM
Host Controlled Thermal Management: thermal management using thresholds configured by the host.

00.04.Notification thresholds report temperature events; thermal-management thresholds control behavior. They are not interchangeable. The aim is to explain the latency tradeoff of lower-power states and distinguish settings, current state, and accumulated statistics.

01 Feature capabilities, reads, and settings

01.01.A Feature is not a simple register. The host first reads capability with SEL=011b, then retrieves current/default/saved views, confirms scope and persistence, and only then writes. Set completion proves command outcome; a follow-up Get and runtime telemetry prove that software observes the new policy.

SEL
Select, the Get Features field choosing current, default, saved, or supported-capabilities view.

01.02.Get Features is the Admin command that retrieves Feature attributes. An engineering flow starts by identifying the FID, querying capability, and retrieving current/default/saved values instead of guessing before a write.

Admin
Administrative, the control path used to create, configure, query, or manage controllers and queues.
FID
Feature Identifier: selects the Feature to read or configure.
Sources: Base 2.4 §5.2.12

Source: NVME-BASE-2.4, Rev. 2.4, §5.2.12, printed pages 209, PDF pages 235

Feature capabilities, reads, and settings
Get Features selectorRequested informationDecision it supports
SEL=000bCurrent valueObserve current controller policy
SEL=001bDefault valueEstablish a rollback baseline
SEL=010bSaved valueDoes not prove a value was saved
SEL=011bCHANG/NSSPEC/SVBLCheck support before changing settings
NSSPEC
Namespace Specific, the capability bit indicating whether a Feature has per-namespace scope.
CHANG
Changeable, the capability bit indicating whether Set Features can modify the Feature value.
SVBL
Saveable, the supported-capabilities bit indicating whether a Feature can be saved.

02 Power-state power, latency, and performance

02.01.A state number alone cannot establish workload suitability. Read MP, NOPS, ENLAT/EXLAT, IDLP/ACTP, and relative performance together in each PSD. Increasing PS numbers reduce maximum power monotonically, but latency and throughput do not necessarily change by a fixed ratio.

ENLAT
Entry Latency, the maximum latency to enter a power state, in microseconds.
EXLAT
Exit Latency, the maximum latency to exit a power state, in microseconds.
ACTP
Active Power, average active power under the specified workload and time window.
IDLP
Idle Power, typical power under the specification's idle measurement conditions.
NOPS
Non-Operational State, the PSD bit indicating that the state does not process I/O commands.
PSD
Power State Descriptor, the structure describing power, latency, operational type, and relative performance for one power state.
MP
Maximum Power, the sustained maximum power of a power state.
PS
Power State, a controller power/performance operating point; PS0 has the highest maximum power.

02.02.A controller shall support at least one power state and may support up to 32, numbered contiguously from zero. PS0 has the highest maximum power; each subsequent state's maximum power does not exceed the preceding state.

Sources: Base 2.4 §8.1.19

Source: NVME-BASE-2.4, Rev. 2.4, §8.1.19, printed pages 666-667, PDF pages 692-693

Power-state power, latency, and performance
Power-state attributePower or performance describedConditions for comparison
MPSustained maximum powerNot an instantaneous sample
IDLP/ACTPIdle typical / active averageDifferent measurement conditions
ENLAT/EXLATMaximum entry/exit latencySum across transitions
RRT/RRL/RWT/RWLRelative throughput/latencyCompare only like characteristics

03 APST idle conditions and automatic transitions

03.01.The 256-byte APST buffer is not a performance table. It contains 32 rules stating which non-operational state to enter after a given idle duration. APSTE enables timer rules, entries with ITPT=0 are inactive, and arriving I/O returns the controller to its most recent operational state.

APSTE
Autonomous Power State Transition Enable, the bit enabling APST-table timer evaluation.
ITPT
Idle Time Prior to Transition, the APST-entry idle threshold in milliseconds.
How idle time affects power state
  1. The host configures idle time ITPT and target state ITPS in APST entries.
  2. When APST is enabled, the controller evaluates idle timers.
  3. At the applicable threshold, it enters the selected non-operational power state.
  4. Resuming I/O requires accounting for the exit latency of that state.
APST uses idle time to save power while introducing transition latency.
ITPS
Idle Transition Power State, the target non-operational power state selected by an APST entry.

03.02.FID 0Ch APSTE=1 enables Autonomous Power State Transition (APST); the default is zero. Enabling it allows controller transitions based on APST-table idle timers; it does not guarantee entry into a particular state.

Sources: Base 2.4 §5.2.30.1.7

Source: NVME-BASE-2.4, Rev. 2.4, §5.2.30.1.7, printed pages 468-469, PDF pages 494-495

APST idle conditions and automatic transitions
APST or background-work settingState-entry or use behaviorConstraints
APSTE=0Host-directed entry onlyThe table may exist but timers do not drive entry
APSTE=1Host- or timer-directed entryITPT must be met continuously
NOPPME=0Background work stays within non-op limitsController work may be deferred
NOPPME=1Background work may raise power temporarilyStill capped by the last operational state
NOPPME
Non-Operational Power State Permissive Mode Enable, controlling whether controller background work may temporarily exceed a non-operational power limit.

04 Temperature thresholds, sensors, and notifications

04.01.FID 04h is more than a temperature number. TMPSEL selects a sensor, THSEL selects over or under, TMPTH sets the trigger point, TMPTHH sets the event clear point, and SMART/Health.TTC plus AEC enable return controller state to the host.

TMPSEL
Temperature Sensor Select, the field choosing Composite Temperature or sensor 1 through 8.
TMPTHH
Temperature Threshold Hysteresis, Kelvin hysteresis used when ending a threshold event.
THSEL
Threshold Type Select, choosing an over-temperature or under-temperature threshold.
TMPTH
Temperature Threshold, a 16-bit threshold value in Kelvin.
TTC
Temperature Threshold Critical Warning, the temperature-threshold bit in SMART/Health Critical Warning.

04.02.FID 04h sets over/under thresholds for Composite Temperature and up to eight implemented temperature sensors. Temperature is encoded in Kelvin; reaching an over threshold or falling to/below an under threshold may set the SMART/Health Temperature Threshold critical warning and trigger an asynchronous event.

Sources: Base 2.4 §5.2.30.1.3

Source: NVME-BASE-2.4, Rev. 2.4, §5.2.30.1.3, printed pages 462-463, PDF pages 488-489

Temperature thresholds, sensors, and notifications
Threshold fieldSelection or settingEvent assertion and clearing
TMPSELComposite or sensor 1-8Get does not use all-sensors selection
THSELOver/underComparison direction is reversed
TMPTHTrigger KelvinLog raw K and converted °C
TMPTHHClear hysteresis in KelvinNot a second trigger threshold

05 Two levels of HCTM thermal management

05.01.HCTM does not select a fixed clock or power state. It gives the controller two temperature boundaries, TMT1/TMT2. At TMT1 the controller minimizes performance impact; at TMT2 it applies stronger thermal control. Actual hysteresis and internal actions are vendor implementation details.

TMT1
Thermal Management Temperature 1, the lighter thermal-management threshold in Kelvin.
TMT2
Thermal Management Temperature 2, the stronger thermal-management threshold in Kelvin.

05.02.FID 10h uses TMT1[31:16] as the lighter thermal-management threshold and TMT2[15:0] as the heavier threshold, both in Kelvin; zero independently disables the corresponding threshold.

Sources: Base 2.4 §5.2.30.1.10

Source: NVME-BASE-2.4, Rev. 2.4, §5.2.30.1.10, printed pages 471-472, PDF pages 497-498

Two levels of HCTM thermal management
Thermal-management field or statisticSetting or observationRequired checks
TMT1Lighter-control boundaryObjective is to minimize impact
TMT2Stronger-control boundaryThermal control takes priority
MNTMT/MXTMTLegal configuration rangeValidate on the host first
SMART countersTransition count/timeEvidence that the control loop acted
MNTMT
Minimum Thermal Management Temperature, the minimum Kelvin value accepted for HCTM.
MXTMT
Maximum Thermal Management Temperature, the maximum Kelvin value accepted for HCTM.

Where to continue in the specification

06.01.Use the flow above to frame the problem, then open the corresponding sections for fields and full conditions. The Chinese tutorial also explains every in-scope figure with its takeaway, example, and details.

Concept to explainSpecification sections
Feature capabilities, reads, and settingsBase 2.4 §5.2.12 · Base 2.4 §5.2.12.1 · Base 2.4 §5.2.30
Power-state power, latency, and performanceBase 2.4 §8.1.19 · Base 2.4 §8.1.19.1 · Base 2.4 §8.1.19.2 · Base 2.4 §5.2.30.1.2 · Base 2.4 §8.1.19.3
APST idle conditions and automatic transitionsBase 2.4 §5.2.30.1.7 · Base 2.4 §8.1.19 · Base 2.4 §5.2.30
Temperature thresholds, sensors, and notificationsBase 2.4 §5.2.30.1.3 · Base 2.4 §5.2.30.1.3.1 · Base 2.4 §5.2.13.1.3
Two levels of HCTM thermal managementBase 2.4 §5.2.30.1.10 · Base 2.4 §5.2.30.1.10, 8.1.19.5 · Base 2.4 §5.2.13.1.3 · Base 2.4 §5.2.30.1.11 · Base 2.4 §8.1.19.4 · Base 2.4 §5.2.12.2
Open the complete Chinese tutorial and figure explanations →

Check your understanding

1. Why are Supported, Current, Default, and Saved not interchangeable Feature values?

07.01.Supported Capabilities describes how the Feature may be used. Current is the active value, Default the default value, and Saved the persisted value subject to support. The read selection determines the reply’s meaning.

Sources

Source: NVME-BASE-2.4, Rev. 2.4, §5.2.12, printed pages 209-210, PDF pages 235-236

Source: NVME-BASE-2.4, Rev. 2.4, §5.2.12, printed pages 210, PDF pages 236

Source: NVME-BASE-2.4, Rev. 2.4, §5.2.12.1, printed pages 211-212, PDF pages 237-238

2. Why might the lowest-idle-power state be unsuitable for a workload that frequently resumes I/O?

07.02.Transitions can incur latency on every entry and exit. Savings during a short idle period must be evaluated alongside entry/exit delays and response-time needs, rather than power numbers alone.

Sources

Source: NVME-BASE-2.4, Rev. 2.4, §8.1.19, printed pages 666-668, PDF pages 692-694

Source: NVME-BASE-2.4, Rev. 2.4, §8.1.19.1, printed pages 668-669, PDF pages 694-695

3. What do idle time and target state determine in an APST entry?

07.03.Idle time specifies the wait before an automatic transition under the applicable conditions. The target selects the destination Power State. Both must be combined with that state’s capabilities and restrictions.

Sources

Source: NVME-BASE-2.4, Rev. 2.4, §5.2.30.1.7, printed pages 468-469, PDF pages 494-495

Source: NVME-BASE-2.4, Rev. 2.4, §5.2.30.1.7, printed pages 469, PDF pages 495

4. Why configure and interpret Temperature Threshold separately from HCTM?

07.04.Temperature Threshold governs temperature conditions and notifications; HCTM provides host-controlled thermal-management behavior. Learning that a threshold was crossed and requesting thermal management are different actions.

Sources

Source: NVME-BASE-2.4, Rev. 2.4, §5.2.30.1.3, printed pages 462-463, PDF pages 488-489

Source: NVME-BASE-2.4, Rev. 2.4, §5.2.30.1.10, 8.1.19.5, printed pages 472, 670-671, PDF pages 498, 696-697

Specification editions

NVM Express Base Specification, Revision 2.4

Jia-Chang

Jia-Chang

Human

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